Intel advanced packaging is emerging as a potential wedge into the hyperscaler AI supply chain, with the chipmaker in active discussions with Google and Amazon to deploy its EMIB-T technology for custom AI accelerators. Rather than asking customers to abandon TSMC entirely, Intel is positioning itself as a specialist in the “core plumbing” of AI infrastructure—the advanced packaging layer that integrates multiple dies into efficient, power-conscious systems.
Key Takeaways
- Intel is negotiating with Google and Amazon to use EMIB-T packaging for their custom AI ASICs.
- EMIB-T mass production is prepared at Intel’s Rio Rancho facility in New Mexico, employing 2,700 people.
- Customers can source wafers from competitors like TSMC and use Intel solely for packaging integration.
- Google’s Humu Fish TPU is expected to use EMIB-T, sized at $4B–$5B in potential revenues by analyst estimates.
- EMIB-T rollout is expected later this year.
Why Packaging Matters for AI Infrastructure
Packaging technology is no longer a commodity differentiator—it is becoming critical infrastructure for AI. As chips grow more complex and power consumption becomes a bottleneck, the way dies are interconnected and cooled determines whether a system succeeds or fails. Intel’s foundry head argues that packaging technology could transform the AI landscape over the next decade. This is not hyperbole. A more efficient packaging approach can reduce power draw, shrink physical footprint, and lower integration costs, all of which matter enormously when you are deploying thousands of accelerators in a data center.
What makes Intel’s pitch compelling is its modularity. Customers do not have to commit to Intel’s full manufacturing pipeline. They can buy wafers from TSMC or Samsung, then hand off the integration work to Intel. This flexibility removes a major friction point: hyperscalers are reluctant to consolidate around a single supplier, especially one recovering from manufacturing stumbles. By positioning itself as a packaging specialist rather than a full-stack foundry, Intel sidesteps that hesitation.
Google and Amazon as Bellwethers
Google’s reported interest in EMIB-T for its Humu Fish TPU is the most concrete signal of traction. KeyBanc estimates this design win alone could represent $4B–$5B in revenues. Amazon, which has been investing heavily in custom silicon through its Trainium and Inferentia chips, faces similar pressure to optimize power and density. Both companies have the scale to justify custom packaging solutions and the leverage to negotiate terms. If either signs a multi-year agreement, it sends a powerful message to the rest of the industry.
The timing is also strategic. AI chip demand is accelerating, and packaging capacity is becoming a genuine bottleneck. TSMC is managing demand across CPUs, GPUs, and now AI accelerators. Intel’s Rio Rancho facility, with its 2,700-person workforce, represents available capacity that competitors cannot easily replicate. A hyperscaler that can secure exclusive or priority packaging slots gains a real competitive advantage in time-to-market and cost structure.
How This Challenges TSMC’s Dominance
TSMC has built its fortress on the back of advanced process nodes—5nm, 3nm, and beyond. Intel’s EMIB and EMIB-T technologies do not compete at the node level. Instead, they compete on what happens after the wafer leaves the fab: how efficiently you can bond multiple dies, manage thermal pathways, and reduce latency between components. For AI accelerators, which often require heterogeneous compute (mixing different types of cores), this becomes a genuine differentiator.
Intel claims EMIB-T offers superior power efficiency, space savings, and flexibility compared to rivals. The modular approach—letting customers bring their own wafers—also undercuts TSMC’s ecosystem lock-in. TSMC wants you to do everything with them. Intel is saying: do your base compute wherever you want, then come to us for the hard part. That is a different competitive angle, and it is one that could resonate with cost-conscious hyperscalers.
However, customer hesitation remains real. Intel has made grand foundry promises before, and execution risk looms. TSMC has also invested in advanced packaging and could respond aggressively if it sees hyperscaler defections. The conversation is still in early stages, and deals are not yet signed.
What EMIB-T Actually Does
EMIB (Embedded Multi-Die Interconnect Bridge) is Intel’s proprietary interconnect technology that allows multiple semiconductor dies to be bonded together with very short signal paths and minimal latency. EMIB-T is the advanced variant, optimized for thermal performance and power efficiency. The technology enables chipmakers to mix and match different dies—high-performance cores, memory controllers, I/O blocks—without forcing everything onto a single monolithic die, which would be prohibitively expensive and power-hungry for AI workloads.
This modular approach is especially valuable for custom ASICs. Google’s TPUs and Amazon’s Trainium chips do not need to follow Intel’s or ARM’s standard architectures. They can be tailored to specific workloads. EMIB-T packaging lets them integrate these custom designs efficiently without reinventing the wheel on interconnect technology. The result is faster time-to-market and lower risk of thermal or signal-integrity issues.
The Broader Foundry Shift
Intel’s foundry ambitions have centered on process node competition: “We will make 7nm, 5nm, 3nm chips.” That strategy has faltered repeatedly. The EMIB-T pitch represents a strategic pivot: “We will not fight you on nodes. We will own the integration layer.” This is a more defensible position because packaging is harder to commoditize than process nodes, and Intel has genuine expertise here.
If the Google and Amazon negotiations close, it signals that hyperscalers are willing to work with Intel on specialized capabilities, even if they do not trust Intel’s core manufacturing yet. That is a foothold. Once Intel proves reliability and cost-effectiveness at packaging scale, it could expand into other integration services, and potentially even win back some full-fab business from customers who see the value of an integrated Intel pipeline.
When Will EMIB-T Ship?
Intel expects EMIB-T to start rolling out later this year. Mass production is being prepared at the Rio Rancho facility in New Mexico. If the Google and Amazon deals close, initial volumes would likely be modest—pilot production to validate the technology in real workloads. Full-scale deployment would follow if performance and cost targets are met.
Is Intel’s packaging strategy credible?
Intel has genuine strengths in interconnect and thermal management. The EMIB technology is real, and the modular approach solves a real problem for hyperscalers. However, execution risk is significant. Intel has overpromised on foundry timelines before. The company must deliver on cost, quality, and schedule to convert negotiations into long-term contracts.
Could TSMC respond with its own packaging innovations?
TSMC has invested in advanced packaging and could accelerate development if it perceives a threat. However, Intel’s modular model—accepting customer wafers from competitors—is harder for TSMC to replicate without fragmenting its own ecosystem strategy. That gives Intel a structural advantage, at least for the next 18–24 months.
Intel’s advanced packaging strategy is not a silver bullet for the foundry business, but it is a smarter play than head-to-head node competition. By focusing on the integration layer and accepting modular supply chains, Intel can capture real value without requiring hyperscalers to abandon their existing suppliers. Google and Amazon negotiations are the first test. If they close, the AI packaging market could reshape itself around Intel’s capabilities—not as a full foundry replacement, but as an indispensable specialist in the infrastructure layer.
Edited by the All Things Geek team.
