ASML’s lithography roadmap represents the semiconductor industry’s only viable path toward continued transistor miniaturization beyond the 3nm barrier. The Dutch equipment maker has mapped a multi-decade progression from deep ultraviolet immersion systems through extreme ultraviolet generations, with each phase unlocking smaller feature sizes and faster production volumes. This roadmap is not theoretical—it is already reshaping how the world’s largest chipmakers design their fabs.
Key Takeaways
- ASML shipped 48 EUV systems in 2025, up from 44 in 2024, signaling accelerating industry adoption.
- EUV lithography now represents 48% of ASML’s system revenue, up from 38% in 2024, driven by AI chip demand.
- High-NA EUV tools cost $380 million to $400 million per unit and are entering limited commercial deployment.
- Hyper-NA technology targets sub-5nm single-exposure resolution for 1nm-class nodes, with commercialization expected post-2028.
- ASML ended 2025 with a €38.8 billion order backlog, indicating multi-year demand visibility.
ASML’s Three-Phase Technology Strategy
ASML’s lithography roadmap divides into three distinct phases, each addressing a specific generation of semiconductor manufacturing. Phase One perfected deep ultraviolet immersion lithography at 193nm wavelength, culminating in systems like the NXT:1980Di that achieved numerical aperture of 1.35 with water immersion. This generation enabled 38nm half-pitch resolution and, through multi-patterning techniques such as LELE and SAQP, extended capability down to 10nm-class nodes. DUV immersion remains the workhorse of the industry—ASML shipped 131 immersion DUV tools in 2025.
Phase Two introduced Low-NA extreme ultraviolet lithography, which has become the dominant technology for advanced chip production. These current-generation EUV scanners are now deployed across the industry’s leading foundries and integrated device manufacturers. The financial impact is substantial: EUV systems accounted for 48% of ASML’s system revenue in 2025, or €11.6 billion ($13.8 billion USD), up sharply from 38% in 2024. This shift reflects the AI boom’s demand for latest processors that require advanced lithography.
Phase Three marks the transition to High-NA EUV technology, which is now moving beyond early experimentation toward high-volume manufacturing readiness. ASML has supplied eight High-NA EUV tools to partners, including six EXE:5000 and two EXE:5200B machines. Intel installed the industry’s first commercial High-NA EUV lithography tool—an ASML Twinscan EXE:5200B—setting the stage for 14A process technology. High-NA systems cost between $380 million and $400 million per unit, making them among the most expensive industrial tools ever built.
Why High-NA EUV Matters Right Now
High-NA EUV is not a marginal improvement over Low-NA systems. It represents a fundamental leap in resolution capability, particularly for post-3nm-class fabrication nodes. The higher numerical aperture allows finer feature definition in a single exposure, reducing the need for costly multi-patterning steps that slow production and increase defect rates. Intel’s deployment of High-NA tools demonstrates that the technology has moved past the research phase—major manufacturers are now betting their process roadmaps on it.
The timing matters because the semiconductor industry faces a resolution wall. Traditional scaling—simply shrinking transistors—has become increasingly difficult below 3nm. EUV lithography, and now High-NA EUV, extends the runway for Moore’s Law by enabling manufacturers to pack more transistors into the same area without abandoning proven manufacturing techniques. ASML’s ability to deliver these tools directly impacts whether Intel, TSMC, Samsung, and other manufacturers can keep up with AI chip demand.
The Hyper-NA Frontier: Beyond 2028
ASML’s lithography roadmap extends into the 2030s with Hyper-NA technology, a next-generation platform targeting numerical apertures of 0.75. This system is designed to achieve sub-5nm single-exposure resolution, enabling production of 1nm-class semiconductor nodes and beyond. Unlike High-NA, which is already in limited commercial deployment, Hyper-NA remains in the exploration phase. ASML’s Chief Technology Officer Martin van den Brink confirmed that the viability of Hyper-NA technology is being investigated, but no final decision has been made yet.
Hyper-NA commercialization is expected post-2028, with tools potentially arriving in the 2030s. This timeline reflects the enormous engineering challenges involved. Moving to higher numerical apertures requires advances in photomask technology, photoresist chemistry, and optical design that do not yet exist in production form. The cost will be staggering—if High-NA tools cost $380 million to $400 million, Hyper-NA systems could easily exceed $500 million, placing them out of reach for all but the largest chipmakers.
Financial Momentum and Industry Outlook
ASML’s financial performance underscores the industry’s commitment to advanced lithography. The company generated €32.7 billion in total revenue in 2025 and ended the year with a €38.8 billion order backlog. This backlog represents multi-year visibility into demand, suggesting that customers are locking in capacity for High-NA and Low-NA EUV tools well in advance. ASML projects €71 billion in revenue by 2030, reflecting expectations that EUV lithography adoption will accelerate across the industry.
The company’s patent portfolio contains 4,995 lithography-related filings, a fortress of intellectual property that makes it nearly impossible for competitors to challenge ASML’s market position. While other equipment makers produce components and subsystems, only ASML manufactures complete EUV lithography systems at scale. This near-monopoly status gives ASML extraordinary influence over the pace and direction of semiconductor miniaturization globally.
What This Means for Chipmakers
ASML’s lithography roadmap is not just a technical document—it is a strategic constraint on every chipmaker’s process node roadmap. Intel, TSMC, Samsung, and others must align their manufacturing plans with ASML’s delivery schedules and technology milestones. Delays in High-NA tool availability directly impact when these companies can launch next-generation chips. Conversely, rapid High-NA adoption accelerates the entire industry’s ability to manufacture smaller, faster, more power-efficient processors.
For the broader semiconductor ecosystem, ASML’s roadmap represents both opportunity and risk. Opportunity because continued miniaturization enables the AI revolution and other advanced applications. Risk because the cost and complexity of advanced lithography tools concentrate manufacturing power in fewer hands. Only the wealthiest chipmakers can afford multiple High-NA systems; smaller competitors must rely on older nodes or foundry partnerships.
Is ASML’s Hyper-NA timeline realistic?
ASML’s post-2028 target for Hyper-NA commercialization is ambitious but not unprecedented. The company delivered the first Low-NA EUV tools in the early 2010s and has steadily ramped production. However, Hyper-NA involves fundamentally new physics and manufacturing processes. Whether ASML can overcome these hurdles by 2028 remains uncertain, and the company has explicitly stated that no final decision on Hyper-NA has been made.
How much does a High-NA EUV tool cost compared to DUV?
High-NA EUV tools cost $380 million to $400 million per unit, roughly 5 to 10 times more than advanced DUV immersion systems. This enormous cost is why only the largest chipmakers are deploying High-NA tools. The price reflects the tool’s complexity, precision requirements, and limited production volume.
Why is ASML’s market position so dominant?
ASML holds near-total control over advanced lithography because it is the only company manufacturing complete EUV systems at scale. The company’s decades of R&D investment, patent portfolio of nearly 5,000 lithography filings, and relationships with leading chipmakers create an insurmountable competitive moat. No rival has successfully challenged ASML’s position in extreme ultraviolet lithography.
ASML’s lithography roadmap is fundamentally a roadmap for the semiconductor industry itself. Each generation—from DUV immersion through High-NA EUV to future Hyper-NA systems—represents a bet that transistor scaling will continue despite mounting physical and economic challenges. The company’s €38.8 billion order backlog and €71 billion revenue projection by 2030 suggest that chipmakers are betting heavily on ASML’s ability to deliver. Whether Hyper-NA becomes reality or remains an engineering aspiration will determine whether Moore’s Law survives the 2030s.
Edited by the All Things Geek team.
Source: Tom's Hardware
